This invention relates to a memory control circuit and, more particularly, to such a control circuit which is operative to control a data write-in operation only if the data to be written into the memory subsists for a minimum time interval, thereby preventing unnecessary write-in operations from being carried out which would deteriorate the memory.
Electronic radio frequency tuners are known in which digital signals are used to establish the various tuning conditions of the tuner. In a typical electronic tuner of the so-called frequency synthesizer type, the frequency of a local oscillating signal, which determines the tuning condition of the tuner, is controlled in accordance with the particular frequency-dividing ratio which is set into a programmable frequency divider. More specifically, a variable frequency oscillator generates the local oscillating signal, and the frequency of this local oscillating signal is divided by the programmable frequency divider. Then, the frequency-divided local oscillating signal is compared in a phase comparator to a constant reference signal. Any deviation between these signals results in an error signal which is fed back to the variable frequency oscillator to vary the frequency of the local oscillating signal generated thereby. Consequently, if the frequency-dividing ratio of the programmable frequency divider is varied, the actual frequency of the local oscillating signal is correspondingly varied so as to result in a change in the tuning condition of the tuner.
In an electronic frequency synthesizer type tuner of the aforementioned type, digital signals are used to control the frequency-dividing ratio of the programmable frequency divider. If the tuner is tuned to a desired broadcast frequency, the digital signal representing that frequency, that is, the digital signal corresponding to the frequency-dividing ratio which then is set in the programmable frequency divider, may be stored in a memory circuit. The user of such a tuner may store a multiple of such frequency-representing digital signals in the memory. If the memory is an addressable memory device, the tuning condition of the frequency synthesizer may be established rapidly merely by addressing a particular storage location of the memory device so as to read out the stored digital signal therefrom, and thus establish a corresponding frequency-dividing ratio in the programmable frequency divider.
It is desirable, when the usual power switch in the electronic tuner first is turned ON, to establish a predetermined tuning condition. Typically, this tuning condition is established by reading out the digital signal stored in a particular address location of the memory circuit. Such tuning condition, preferably, is the very same tuning condition that existed at the time that power last had been interrupted from the tuner. Thus, when the power switch first is closed, the tuner is tuned to the same broadcast frequency to which it had been tuned during its last operative condition. To effect this predetermined tuning condition, the digital signal representing the broadcast frequency which had been received immediately prior to turning the power switch OFF should be stored in a predetermined address location of the memory circuit so that, when the power switch next is turned ON, this location can be addressed and the digital signal stored therein can be read out and used to determine the dividing ratio of the programmable frequency divider. In one attempt to store this digital signal, it has been proposed to write in the digital signal, representing the frequency which then is being received, into a predetermined address location only in response to turning the power switch OFF. This generally requires a capacitor to be charged while the power switch is ON, and then to be discharged to a write-in circuit when the power switch is turned OFF. To ensure a sufficient write-in time duration, the capacitance of the capacitor must be sufficiently large. Desirably, the memory circuit which is used to store this, as well as the other frequency-representing digital signals, should be a non-volatile memory such that the contents thereof are stored even when power is removed therefrom. An example of such a non-volatile memory is an MNOS memory. Alternatively, if a voltage memory is used, a back-up battery must be provided in order to supply power to that memory such that it can retain the digital signals stored therein even when the main power switch of the tuner is turned OFF. However, typical non-volatile memories require a relatively long write-in time duration. Consequently, the capacitor which is used to control the write-in operation when the power switch is turned OFF must be of extremely high capacitance.
Another proposal for storing the digital signal representing the last-received broadcast frequency to which the tuner is tuned immediately prior to power interruption provides a sensing circuit for sensing whenever the frequency-representing digital signal is changed to initiate a write-in operation such that this new digital signal is stored in a predetermined address of the memory. Since it is not known when the user of the tuner will turn the power switch OFF, the content of this predetermined addressed location in the memory must be updated with each new digital signal. This, however, means that if the user merely is scanning the various broadcast frequencies, the frequency-representing digital signal will change relatively rapidly. Since each new digital signal must be stored in the predetermined memory address location, a large number of write-in operations must be carried out. Since a non-volatile memory will deteriorate if it is subjected to many write-in operations, it is appreciated that this proposal is disadvantageous because it requires the writing in of many digital signals, in succession, even though such digital signals may represent merely transient broadcast frequencies in which the user may not be interested.